The Geekbench benchmark has revealed the chipset specifications of the Google Pixel 7 Pro smartphone. The processor is based on older cores, but it is still faster than its predecessor.
In total, the chip has eight cores, including two large Cortex-X1, two high-performance Cortex-A76 and four energy-efficient Cortex-A55. Despite the similarity of the cores with its predecessor, the processor will receive some differences. So, Google will overclock the Cortex-A76 cores at 100 MHz (up to 2.35 GHz) and Cortex-X1 at 50 MHz (up to 2.85 GHz). According to the benchmark, the performance of the chip in multi-core mode will increase by 10%. Also, the processor will receive not five, but a four-nanometer process technology, which will also have a positive effect on performance.
The integrated graphics of the chipset will also change: instead of the old GPU in the face of the Mali-G78 MP20, the Mali-G710 will come. Thus, graphics performance will increase by 20%, energy consumption will decrease by the same amount. The processor should also receive a new Samsung S5300 modem and an auxiliary Jaineiro chip for artificial intelligence-based computing.
In total, the chip has eight cores, including two large Cortex-X1, two high-performance Cortex-A76 and four energy-efficient Cortex-A55. Despite the similarity of the cores with its predecessor, the processor will receive some differences. So, Google will overclock the Cortex-A76 cores at 100 MHz (up to 2.35 GHz) and Cortex-X1 at 50 MHz (up to 2.85 GHz). According to the benchmark, the performance of the chip in multi-core mode will increase by 10%. Also, the processor will receive not five, but a four-nanometer process technology, which will also have a positive effect on performance.
The integrated graphics of the chipset will also change: instead of the old GPU in the face of the Mali-G78 MP20, the Mali-G710 will come. Thus, graphics performance will increase by 20%, energy consumption will decrease by the same amount. The processor should also receive a new Samsung S5300 modem and an auxiliary Jaineiro chip for artificial intelligence-based computing.
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